Integrated circuit with at least one bump

ABSTRACT

In an integrated circuit ( 1 ) having a substrate ( 3 ) and having a signal-processing circuit ( 4 ) which is produced at a surface ( 8 ) of the substrate ( 3 ), there is provided on the substrate surface ( 8 ) a protective layer ( 12 ) that has at least one aperture ( 13 ) through which a second contact pad ( 14 ) is electrically and mechanically connected to a first contact pad ( 9 ), wherein the second contact pad ( 14 ) is of a height of at least 15 μm and projects laterally beyond the aperture ( 13 ) on all sides and is seated on the protective layer ( 12 ) by an overlap zone (z) that is closed on itself like a ring, wherein the overlap zone (z) has a constant width of overlap (w) of between 2 μm and 15 μm, and wherein at least one element of the signal-processing circuit ( 4 ), and preferably only one capacitor ( 5 ) of the signal-processing circuit ( 4 ), is provided opposite the first contact pad ( 9 ).

The invention relates to an integrated circuit, having a substrate andhaving a signal-processing circuit, which signal-processing circuit isproduced in a region of the substrate adjoining a surface of thesubstrate and has a plurality of circuit elements and at least one firstcontact pad, wherein the first contact pad has a first boundary faceaccessible from outside the substrate and a second boundary faceopposite from the first boundary face, wherein the first contact pad isintended for the electroconductive connection of a component contact ofa circuit component external to the integrated circuit to thesignal-processing circuit, and having a protective layer that iselectrically insulating and is provided on the surface of the substrateto protect the regions of the integrated circuit covered by saidprotective layer, wherein for each first contact pad an aperture in theprotective layer is provided, and wherein for each first contact pad asurface contact pad (=second contact pad) (bump) is provided that is ofa height of at least 15 μm and is intended for direct connection to acomponent contact and extends through the relevant aperture to the firstcontact pad and is electroconductively connected to the first contactpad and is seated on the protective layer by an overlap zone thatprojects laterally beyond the aperture and is closed on itself like aring.

An integrated circuit of this kind is known from U.S. Pat. No. 5,281,855A. In this known integrated circuit there are provided two lower contactpads (=first contact pads) and two apertures in the protective layer andtwo surface contact pads (=second contact pads). The two apertures areeach approximately square in area, the side-length being approximately150 μm. The two surface contact pads are each rectangular in area andhave an indentation in one long side. The side-lengths of therectangular areas are 406 μm and 152 μm, which corresponds to 16milli-inches and 6 milli-inches. Each indentation has two side lengths,namely approximately 137 μm and approximately 57 μm. From theside-lengths, the area obtained for each aperture is approximately13,225 μm² and for each surface contact pad it is 61,712 μm², less thearea of an indentation of approximately 7,810 μm², i.e. approximately53,900 μm². It follows from this that the area of the surface contactpad is more that four times the area of the apertures and that more thanthree-quarters (¾) of the area of each surface contact pad is formed bythe overlap zone, which overlap zone projects beyond the apertureconcerned and is seated on the protective layer. An overlap zone aslarge as this is provided because, under the teaching advanced anddescribed in U.S. Pat. No. 5,291,855 A, it is only by the combination ofthe protective layer and the respective surface contact pads, which aresituated one above the other in the overlap zone, that, in a connectingprocess for connecting the surface contact pads to connecting wiresbelonging to a transmission coil, adequate mechanical protection isensured for the circuit elements that underlie respective first contactpads in the regions of each of the surface contact pads. The circuitelements underlying the first contact pads are transistors, diodes,resistors, parts of memories and the like. The connecting process ispreferably a thermal compression bonding process but it may also be someother process such as, say, a soldering process or a welding process.

In the known integrated circuit it is a fact that only approximately aquarter (¼) of the area of a surface contact pad is connected to therelevant first contact pad through the associated aperture and thatapproximately three quarters (¾) of the area of a surface contact pad isseated on the protective layer and is therefore connected thereto. Thismeans that the connection that exists between the surface contact padand the first contact pad is substantially better in mechanical termsthan that between the surface contact pad and the protective layer. Thisfact is irrelevant in integrated circuits which, after being connectedto, for example, a transmission coil, are placed in a glass or plasticcapsule and are thus well protected against mechanical stresses. Thesituation is different, however, for integrated circuits that areconsiderably less well protected against external mechanical stressesthroughout the whole of their period in operation or working life, suchas, say, RF transponders in the form of tags, labels and chip-cards,because the design described above that is familiar from knownintegrated circuits is often unsuitable for integrated circuits of thiskind, the reason being the connection of each surface contact pad to theprotective layer and the inadequate capacity this connection has towithstand mechanical loads which, when the known design is used intransponders that are not so well protected mechanically, means that,when there are high mechanical loads, the mechanical connection ofrelatively small area between each surface contact pad and itsassociated first contact pad has to withstand relatively high forces,which, however, can easily result in the connection being overloaded andhence to its being adversely affected or even destroyed.

It is an object of the invention to overcome the problems outlined aboveand to produce an improved integrated circuit.

To achieve the above object, features according to the invention areprovided in an integrated circuit according to the invention, thusenabling an integrated circuit according to the invention to becharacterized in the manner specified below, namely:

An integrated circuit, having a substrate and a signal-processingcircuit, which signal-processing circuit is produced in a region of thesubstrate adjoining a surface of the substrate and has a plurality ofcircuit elements and at least one first contact pad, wherein the firstcontact pad has a first boundary face accessible from outside thesubstrate and a second boundary face opposite from the first boundaryface, wherein the first contact pad is intended for theelectroconductive connection of a circuit component external to theintegrated circuit to the signal-processing circuit, and having aprotective layer that is electrically insulating and is provided on thesurface of the substrate to protect the regions of the integratedcircuit covered by said protective layer, wherein for each first contactpad an aperture is provided in the protective layer, wherein for eachfirst contact pad a second contact pad is provided that is of a heightof at least 15 μm, intended for direct connection to a componentcontact, that extends through the relevant aperture to the first contactpad and is electroconductively connected to the first contact pad, andthat is seated on the protective layer by an overlap zone that projectslaterally beyond the aperture and is closed on itself like a ring,wherein, along the whole of its ring-like extent, the overlap zoneprojects beyond the aperture laterally by substantially the same widthof overlap and the width of overlap is in a range of between 2 μm and 15μm and at least one element of the signal-processing circuit is providedopposite the second boundary face of the first contact pad.

What is achieved in an easy way by the provision of the featuresaccording to the invention is that, apart from an only narrow overlapzone, which is required and is therefore provided for reasons ofprotection against unwanted etching of a given lower contact pad (=firstcontact pad) when the associated surface contact pad (=second contactpad) is being produced, the planar shape and the area of a surfacecontact pad (=second contact pad) are almost the same as the planarshape and area of the associated surface contact pad and a very strong,robust and durable mechanical connection able to withstand highmechanical loads is obtained. Another very important advantage is thatan integrated circuit according to the invention can be manufactured byintegration processes that are already known and that no new equipmentis therefore required in an existing wafer factory to enable anintegrated circuit according to the invention to be produced. As wasfound in test studies made in the course of development of theintegrated circuit according to the invention, sufficiently goodprotection is provided by means of each surface contact pad and thelower contact pad situated beneath it for the at least one element,situated beneath the first contact pad, of the signal-processingcircuit, even though only a small overlap zone is provided in anintegrated circuit according to the invention, the reason being that ahigh protective action is obtained firstly as a result of the relativelyconsiderable height of the surface contact pad and secondly as a resultof the interconnections that are provided in any integrated circuit andare formed by at least one metal layer. Another very great advantage isthat test pads can be produced that take up only a very small area, i.e.with no substantial loss of IC area, and that in this case at leastparts of test circuits, protective circuits and driver circuits can beprovided below the test pads, which means that testing time-spans thatare shorter than those currently achievable can be achieved, whichaffords considerable savings of time in a wafer test. After a wafer testof this kind has been performed, test pads of this kind and also otherpads which are then no longer needed can be electrically isolated fromthe integrated circuit by cutting so-called saw loops. What is achievedby the isolation of the test pads and other pads that are no longerneeded is firstly that no short-circuits can occur as a result ofinaccuracies of positioning when the finished ICs are being used andthat with so-called mother modules entire product families can veryeasily be processed in one highly-optimized module, the reason for thisbeing that the connections are in the same positions on all the ICsbelonging to one product family, secondly that the speed of fitting inproduction can be considerably increased as compared with currentfacilities and costs can be reduced in this way, and thirdly that a highlevel of security is achieved because access to the internal parts of asignal-processing circuit is prevented due to the fact that the onlyitems that still provide an electroconductive connection to thesignal-processing circuit in the interior of the ICs are the surfacecontact pads formed in accordance with the invention.

In an integrated circuit, there may be provided opposite the secondboundary face of the first contact pad, i.e. below the first contactpad, a plurality of circuit elements, such as inductors, capacitors,resistors, transistors, diodes, memories and the like, by means of whicha multiplicity of signal-processing circuits can be produced, such asaudio and video signal-processing circuits, chip-card signal-processingcircuits or transponder circuits, but also protective stages, driverstages and test stages for such signal-processing circuits. In anintegrated circuit according to the invention, it has proved to behighly advantageous if only a capacitor belonging to thesignal-processing circuit is provided opposite the second boundary faceof the first contact pad. This is particularly advantageous because acapacitor of this kind can then be made relatively large in area and asa result is at relatively little risk from mechanical stresses, whichmeans that even if relatively high forces are applied to the surfacecontact pad provided above the lower contact pad, as is the case, forexample, in a thermal compression bonding process or a flip-chipconnecting process, there is no risk of any damage being done to thecapacitor of relatively large area.

In an integrated circuit according to the invention, it has proved to behighly advantageous if the planar shape of the capacitor, which planarshape extends parallel to the surface of the substrate, and the planarshapes of the second contact pad and the aperture, which planar shapeslikewise extend parallel to the surface of the substrate, aresubstantially the same and if the area of the planar shape of thecapacitor is at most 10% larger than the area of the planar shape of thesecond contact pad. In this way, the region situated below a surfacecontact pad (=second contact pad) and a lower contact pad (=firstcontact pad) lying one above the other is used in its entirety for theproduction of the capacitor, while at the same time very good protectionis ensured for this capacitor of an optimum large size.

In an integrated circuit according to the invention, it has proved to beparticularly advantageous if the capacitor is formed by a multilayercapacitor. This is advantageous because a capacitor of this kind has avery high capacitance per unit length and is very robust mechanically.

In an integrated circuit according to the invention, it has proved to beparticularly advantageous if at least one metal layer is providedbetween the lower contact pad (=first contact pad) and the capacitor toact as a layer providing mechanical protection for the capacitor. Aparticularly good protective function for the capacitor is obtained inthis way.

In an integrated circuit according to the invention, it has also provedto be highly advantageous if the lower contact pad (=first contact pad)comprises at least two metal layers that are connected togetherelectrically and mechanically by electroconductive bridges. This ishighly advantageous from the point of view of a protective function forthe capacitor situated opposite the first contact pad that is as good aspossible.

In an integrated circuit according to the invention, it has proved to beparticularly advantageous if the width of overlap is of a nominal valueof 7 μm. A configuration of this kind has proved advantageous from thepoint of view of a good compromise between on the one hand an overlapzone that is sufficiently wide for the purposes of protection againstunwanted etching and on the other hand a narrow overlap zone that savesas much space as possible.

These and other aspects of the invention are apparent from and will beelucidated with reference to the embodiments described hereinafter.

IN THE DRAWINGS

FIG. 1 is a highly diagrammatic sectional view along line I—I in FIG. 2showing an integrated circuit according to a first embodiment of theinvention.

FIG. 2 is a view from above of the integrated circuit shown in FIG. 1.

FIG. 3 is a sectional view similar to that in FIG. 1, showing a detailof the integrated circuit shown in FIGS. 1 and 2.

FIGS. 1 to 3 show an integrated circuit 1 that will be referred to belowas IC 1 for short. The IC 1 is intended and arranged for use in atransponder, which transponder is not shown in the Figures. Thetransponder is arranged for non-contacting communication with acommunication station suitable for this purpose and comprisesessentially the IC 1 and a transmission coil, connected to the IC 1 andintended as a means of transmission operating without physical contact,which transmission coil comprises a plurality of turns of coil and twoconnecting contacts. The transmission coil forms in this case a circuitcomponent external to the IC 1, with the two coil connecting contactseach forming a component contact. It is assumed that the transmissioncoil is a transmission coil wound from coil wire whose coil connectingcontacts are each formed by one end of the wire. A wire-end 2 of thiskind is indicated diagrammatically in FIG. 2 by dotted and dashed lines.The transmission coil may, however, also be produced in other ways, suchas, for example, in the form of an etched coil or a printed coil, whichcoils are provided on a substrate similar to a printed circuit board.The coil connecting contacts may be connected by a thermal compressionbonding process or a soldering process or even by a so-called flip-chiptechnique.

The IC 1 has a substrate 3. Produced in the substrate 3 of the IC 1 is asignal-processing circuit 4, of which signal-processing circuit 4 afirst circuit element 5, a second circuit element 6 and a third circuitelement 7 are diagrammatically indicated in FIG. 1. Thesignal-processing circuit 4 is produced in a region of the substrate 3that adjoins a surface 8 of the substrate 3. The signal-processingcircuit 14 has a plurality of circuit elements, of which only the threeelements 5, 6 and 7 are indicated in FIG. 1. The signal-processingcircuit 4 is, in the present case, a circuit for processing transpondersignals, i.e. signals that are transmitted from a communication stationto a transponder and are received by the transponder, and signals thatare generated by the transponder and are transmitted by the transponderto a communication station, the communication taking place in bothdirections without physical contact, for example inductively,capacitively or optically.

In the present case, the signal-processing circuit 4 has two firstcontact pads 9, of which only one first contact pad 9 is shown in FIGS.1 to 3. The two first contact pads 9 are intended for theelectroconductive connection of the two coil connecting contacts(wire-ends 2) of the transmission coil external to the IC 1 to thesignal-processing circuit 4. The two first contact pads 9 comprisealuminum (Al). Each first contact pad 9 has a first boundary face 10accessible from outside the substrate 3 and a second boundary face 11opposite from the first boundary face 10.

The IC 1 is further provided with a protective layer 12, which in thepresent case comprises silicon nitride (SiN) and has a thickness ofapproximately 1.5 μm. A protective layer 12 of this kind may, however,also be of two-layer construction and in this case comprises a layerapproximately 500 nm thick of a so-called PSG and a layer approximately1000 nm thick of a nitride, the latter layer being applied to the layerof PSG, thus giving a total thickness of approximately 1.5 μm. Atwo-layer protective layer 12 of this kind is particularly robustmechanically and thus performs a particularly good protective function.A protective layer 12 of this kind may, however, also comprise adifferent material, for example of a so-called PSG or a so-called PTEOSor of oxynitrides or other nitrides or of a combination of suchmaterials. A protective layer of this kind may also be of a differentthickness, such as, for example, a thickness of 1 μm or a thickness of 2μm. The protective layer 12 is electrically insulating. The protectivelayer 12 is provided on the surface 8 of the substrate 3, being soprovided to protect those regions of the signal-processing circuit 4 orof the IC 1 that are covered by it. Provided in the protective layer 12for each first contact pad 9 is an aperture 13, which means that in thepresent case there are two such apertures 13 provided in the protectivelayer 12, though only one such aperture 13 is shown in FIGS. 1 to 3.

For each lower contact pad 9, there is provided in the IC 1 a surfacecontact pad 14, which means that in the present case there are two suchsurface contact pads 14 provided, though only one such surface contactpad 14 is shown in FIGS. 1 to 3. In the present case, each surfacecontact pad 14 comprises a base layer 15 that comprises titaniumtungsten (TiW) and that has a thickness of approximately 1 μm (but mayalso have a thickness of 1.5 μm or 2 μm) and a main part 16 that isprovided on the base layer 15 and that in the present case comprisesgold (Au). The height h to which each surface contact pad 14 rises abovethe protective layer 12 is in the present case a nominal height of 18μm. The height may, however, also be one of only 15 μm. The height hmay, however, also be selected to be greater than 18 μm and be, forexample, 20 μm or 23 μm or 25 μm. Each surface contact pad 14 isintended to be connected directly to a component contact, i.e. to awire-end 2 in the present case. In this case, the connection betweeneach surface contact pad 14 and an associated wire-end 2 is made by athermal compression bonding process. Each surface contact pad 14 extendsthrough the relevant aperture 13 to the relevant first contact pad 9,with which first contact pad 9 the surface contact pad 14 has anelectroconductive connection.

As can be seen from FIGS. 1 to 3, the surface contact pad 14 is seatedon the protective layer 12 by an overlap zone z (see FIG. 3) whichprojects beyond the aperture 13 laterally on all sides and which isclosed on itself like a ring. In this case, the arrangement made in theIC 1 is advantageously such that the overlap zone z projects laterallybeyond the aperture 13 on all sides to substantially the same width ofoverlap w over the whole of its ring-like extent. Only in its fourcorner regions does the size of the overlap zone z differ from the widthof overlap w, which is a logical result of the geometrical conditions.In the present case, the value of the width of overlap w is a nominalfigure of 7 μm. In other words, what this means is that the width ofoverlap w is to be of a desired value of 7 μm, from which desired valuethere are deviations as a result of the manufacturing processes. Theoverlap zone z is important because the provision of said overlap zone zprevents any unwanted incipient etching of the first contact pad 9 whenthe surface contact pad 14 is being produced. It should, however, bestated that the width of overlap w of the overlap zone z need notnecessarily be selected to be of a nominal size of 7 μm, but may also beof different sizes as a function of the manufacturing processesemployed, in which case it has proved advantageous if the width ofoverlap w is within a range of between 2 and 15 μm.

As can be seen from FIGS. 1 to 3, opposite the second boundary face 11of the first contact pad 9 is provided an element of thesignal-processing circuit 4, only the first element 5 of thesignal-processing circuit 4 being provided opposite the second boundaryface 11 of the first contact pad 9 in the present case. The circuitelement 5 is a capacitor in the present case. It should, however, bestated that one or more different circuit elements may also be providedopposite the second boundary face 11 of the first contact pad 9 ratherthan just the one capacitor 5.

In the IC 1, the planar shape of the capacitor 5, which planar shapeextends parallel to the surface 8 of the substrate 3, and the planarshapes of the surface contact pad 14 and the aperture 13 are the same,as can be seen from FIG. 2. As can also be seen from FIG. 2, the area ofthe planar shape of the capacitor 5 is larger than the area of theplanar shape of the surface contact pad 14. It has proved useful in thiscase if the area of the planar shape of the capacitor 5 is at most 10%larger than the area of the planar shape of the surface contact pad 14.The area of the planar shape of the capacitor 5 may, however, also be ofthe same size as the area of the planar shape of the surface contact pad14. The area of the planar shape of the capacitor 5 may, however, alsobe smaller than the area of the planar shape of the surface contact pad14. The area of each surface contact pad 14 is rectangular and has twoside-lengths of 200 μm and 500 μm. Surface contact pads of above-averagesize of this kind afford the considerable advantage that accuracy ofpositioning becomes fairly uncritical in production, an advantageousresult of which is that a high throughput can be obtained in production.

The area of each surface contact pad 14 may, however, also berectangular with beveled corner regions, i.e. octagonal in the finalanalysis, as is indicated in dotted and dashed lines in FIG. 2. Insteadof being beveled in the way indicated by the dotted and dashed lines,the corner regions of a rectangular area of each surface contact pad 14may also be rounded. The areas of the base part 15 and the aperture 13are then selected to suit the configuration that has been selected forthe area of the surface contact pad 14 in the given case, as isindicated in FIG. 2 by broken lines. What is achieved by the provisionof the bevels or roundings is that the risk of micro-cracks in regionsof the signal-processing circuit 4 that are situated below the givenfirst contact pad 9 at points adjacent to the corner regions isconsiderably reduced, because the bevels or roundings give a betterdistribution of pressure, which is particularly important when a thermalcompression bonding process is used to connect the wire-end 2 to asurface contact pad 14 because in a thermal compression bonding processof this kind there may be a pressure of more than 500 g in the region ofthe first contact pad 9. The planar shape in question may also beselected to be oval or dumbbell shaped. Other surface contact padgeometries and ones designed to meet special requirements are alsopossible, in which case optimization of the given surface contact padgeometry to suit an assembling process may be opted for, which is doneby using suitable measuring facilities to determine the bending,pressure and temperature-distribution conditions that occur in anassembling process and, from the results obtained from the measurements,producing an optimum surface contact pad geometry, which can be doneinexpensively and at no risk by changing passivating masks and thesurface contact pad mask, which means that particularly good protectionwill then be obtained for the parts of the signal-processing circuit 4underlying the surface contact pads 14 and pads 9. The area of eachsurface contact pad 14 may, however, also be square, in which case theside-lengths may be 200 μm or even 90 μm. If the surface contact pads 14are not intended for connection to coil connecting contacts but forexample for connecting in a testing means for testing the IC 1, then thesurface contact pads 14 may also be square with a side-length of only 60μm.

As can be seen from FIG. 3, the capacitor 5 is formed by a multilayercapacitor 5. The capacitor 5 is what is referred to as a high-voltageTIM gate oxide capacitor in HPW. The capacitor 5 has a PSHN layer 19that is one electrode of the capacitor. The capacitor 5 also has a TIMlayer 20 that is a further electrode. Between the PSHN layer 19 and theTIM layer 20 is provided an insulating interlayer 21 that is indicatedin FIG. 3 simply by a thicker line. The three layers 19, 20 and 21 forma first sub-capacitor of the multilayer capacitor 5. The capacitor Salso has an HPW layer 22 that is a further electrode of the capacitorand that, with the substrate 3, forms a second sub-capacitor of themultilayer capacitor 5. In connection with the capacitor 5, attentionshould also be drawn to a LOCOS region 23 and an NCS region 24. TheLOCOS region 23 and the NCS region 24 are intended to act asedge-protection zones to prevent unwanted electrical breakdowns such asmight occur if the potential conditions were unfavorable. The design ofthe capacitor 5 as described above is a capacitor design that, at leastin principle, is known per se and for this reason the design of thecapacitor 5 will not be considered in any greater detail here. It shouldbe mentioned that there are also a large number of other designs for acapacitor that could be used in an IC 1 according to the invention.

Regarding the IC 1, it should also be mentioned that there are a totalof five metal layers provided in the IC 1, namely a first metal layer25, a second metal layer 26, a third metal layer 27, a fourth metallayer 28 and a fifth metal layer 29.

The first metal layer 25 comprises titanium tungsten (TiW) and has athickness of approximately 600 nm. Its thickness may, however, also be500 nm or 700 nm. The first metal layer 25 is intended for theelectroconductive connection of the capacitor 5 to other elements of thesignal-processing circuit 4, there being provided between the firstmetal layer 25 and the capacitor 5 two electroconductive bridges 30 thatalso comprise aluminum (Al), of which only one bridge 30 of this kindcan be seen in FIG. 3.

The second metal layer 26 and the third metal layer 27 comprise aluminum(Al) and have a thickness of approximately 750 nm. Their thickness may,however, also be 700 nm or 800 nm. The two metal layers 26 and 27 arenot used for electrical connection purposes in the present case, or inother words, there is no electroconductive connection from the secondmetal layer 26 and the third metal layer 27 to other circuit elements.The second metal layer 26 and the third metal layer 27 advantageouslyperform a mechanical protective function for the capacitor 5, doing sowhen the surface contact pad 14 is being connected to an end 2 of thecoil wire by means of a thermal compression bonding process.

The fourth metal layer 28 and the fifth metal layer 29 comprise aluminum(Al), the fourth metal layer 28 having a thickness of approximately 750nm and the fifth metal layer 29 having a thickness of approximately 1000nm. The thickness of the fourth metal layer 28 may be between 700 nm and800 nm. The thickness of the fifth metal layer 29 may be between 900 nmand 1100 nm. In the present case, the fourth metal layer 28 and thefifth metal layer 29 are connected together by a plurality of bridges 31that also comprise aluminum (Al). The lower contact pad 9 of the IC 1 isproduced by means of the fourth metal layer 28 and the fifth metal layer29 and the bridges 31 situated therebetween.

What is advantageously obtained in the IC 1 shown in FIGS. 1 to 3 is amechanically very strong mechanical and electrical connection able towithstand relatively high loads between each surface contact pad 14 andthe associated lower contact pad 9, there also being ensured at the sametime good mechanical protection for the capacitor 5 which is situatedbelow each surface contact pad 14 and its associated lower contact pad9.

The IC 1 that has been described by reference to FIGS. 1 to 3 isintended for use in a transponder. However, an integrated circuitaccording to the invention may also be used with advantage in othercases, such as, for example, in integrated circuits for chip cards orremote controls or the like.

1. An integrated circuit, having a substrate and having asignal-processing circuit, which signal-processing circuit is producedin a region of the substrate adjoining a surface of the substrate andhas a plurality of circuit elements and at least one first contact pad,wherein the first contact pad has a first boundary face accessible fromoutside the substrate and a second boundary face opposite from the firstboundary face, wherein the first contact pad is intended for theelectroconductive connection of a component contact of a circuitcomponent external to the integrated circuit to the signal-processingcircuit, and having a protective layer that is electrically insulatingand provided on the surface of the substrate to protect the regions ofthe integrated circuit covered by said protective layer, wherein foreach first contact pad an aperture in the protective layer is provided,wherein for each first contact pad a second contact pad is provided thatis of a height of at least 15 μm and is intended for direct connectionto a component contact and extends through the relevant aperture to thefirst contact pad and is electroconductively connected to the firstcontact pad and is seated on the protective layer by an overlap zonethat projects laterally beyond the aperture and is closed on itself likea ring, wherein, along the whole of its ring-like extent, the overlapzone projects beyond the aperture laterally by substantially the samewidth of overlap, wherein the width of overlap is in a range of between2 μm and 15 μm, and wherein at least one element of thesignal-processing circuit is provided opposite the second boundary faceof the first contact pad.
 2. An integrated circuit as claimed in claim1, wherein only one capacitor belonging to the signal-processing circuitis provided opposite the second boundary face of the first contact pad.3. An integrated circuit as claimed in claim 2, wherein the planar shapeof the capacitor, which planar shape extends parallel to the surface ofthe substrates, and the planar shapes of the second contact pad and theaperture, which planar shapes also extend parallel to the surface of thesubstrates, are substantially the same, and the area of the planar shapeof the capacitor is at most 10% larger than the area of the planar shapeof the second contact pad.
 4. An integrated circuit as claimed in claim2, wherein the capacitor is formed by a multilayer capacitor.
 5. Anintegrated circuit as claimed in claim 2, wherein at least one metallayer is provided between the first contact pad and the capacitor as amechanical protective layer for the capacitor.
 6. An integrated circuitas claimed in claim 2, wherein the first contact pad comprises at leasttwo metal layers that are connected together electrically andmechanically by electroconductive bridges.
 7. An integrated circuit asclaimed in claim 1, wherein the width of overlap is of a nominal valueof 7 μm.